? semiconductor components industries, llc, 2015 october, 2015 ? rev. 0 publication order number: 74lvc86a/d 1 74lvc86a low-voltage cmos quad 2-input xor gate with 5 v?tolerant inputs the 74lvc86a is a high performance, quad 2?input xor gate operating from a 1.2 to 3.6 v supply. high impedance ttl compatible inputs significantly reduce current loading to input drivers while ttl compatible outputs offer improved switching noise performance. a v i specification of 5.5 v allows 74lvc86a inputs to be safely driven from 5.0 v devices. current drive capability is 24 ma at the outputs. features ? designed for 1.2 to 3.6 v v cc operation ? 5.0 v tolerant inputs ? interface capability with 5.0 v ttl logic ? 24 ma output sink and source capability ? near zero static supply current (10 a) substantially reduces system power requirements ? esd performance: human body model >2000 v machine model >200 v ? these devices are pb?free, halogen free/bfr free and are rohs compliant tssop?14 dt suffix case 948g 14 1 soic?14 d suffix case 751a 14 1 marking diagrams see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information www. onsemi.com lvc86ag awlyww 1 14 lvc 86a alyw 1 14 a = assembly location l, wl = wafer lot y, yy = year w, ww = work week g or = pb?free package (note: microdot may be in either location)
74lvc86a www. onsemi.com 2 pin names function data inputs outputs pins an, bn on l l h h l h l h inputs outputs an bn l h h l on truth table figure 1. pinout: 14?lead (top view) 13 14 12 11 10 9 8 2 1 34567 v cc a2 b2 o2 a3 b3 o3 a0 b0 o0 a1 b1 o1 gnd 3 o0 1 a0 2 b0 6 o1 4 a1 5 b1 11 o2 13 a2 12 b2 8 o3 10 a3 9 b3 figure 2. logic diagram
74lvc86a www. onsemi.com 3 maximum ratings symbol parameter value condition unit v cc dc supply voltage ?0.5 to +6.5 v v i dc input voltage ?0.5 v i +6.5 v v o dc output voltage ?0.5 v o v cc + 0.5 output in high or low state (note 1) v i ik dc input diode current ?50 v i < gnd ma i ok dc output diode current ?50 v o < gnd ma +50 v o > v cc ma i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range ?65 to +150 c t l lead temperature, 1 mm from case for 10 seconds t l = 260 c t j junction temperature under bias t j = 135 c ja thermal resistance (note 2) soic = 85 tssop = 100 c/w msl moisture sensitivity level 1 stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. i o absolute maximum rating must be observed. 2. measured with minimum pad spacing on an fr4 board, using 10 mm?by?1 inch, 2 ounce copper trace no air flow. recommended operating conditions symbol parameter min typ max units v cc supply voltage operating functional 1.65 1.2 3.6 3.6 v v i input voltage 0 5.5 v v o output voltage high or low state 3?state 0 0 v cc 5.5 v i oh high level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v ?24 ?12 ma i ol low level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v 24 12 ma t a operating free?air temperature ?40 +125 c t/ v input transition rise or fall rate v cc = 1.65 v to 2.7 v v cc = 2.7 v to 3.6 v 0 0 20 10 ns/v functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability.
74lvc86a www. onsemi.com 4 dc electrical characteristics symbol parameter conditions ?40 c to +85 c ?40 c to +125 c unit min typ (note 3) max min typ (note 3) max v ih high?level input voltage v cc = 1.2 v 1.08 ? ? 1.08 ? ? v v cc = 1.65 v to 1.95 v 0.65 x v cc ? ? 0.65 x v cc ? ? v cc = 2.3 v to 2.7 v 1.7 ? ? 1.7 ? ? v cc = 2.7 v to 3.6 v 2.0 ? ? 2.0 ? ? v il low?level input voltage v cc = 1.2 v ? ? 0.12 ? ? 0.12 v v cc = 1.65 v to 1.95 v ? ? 0.35 x v cc ? ? 0.35 x v cc v cc = 2.3 v to 2.7 v ? ? 0.7 ? ? 0.7 v cc = 2.7 v to 3.6 v ? ? 0.8 ? ? 0.8 v oh high?level output voltage v i = v ih or v il v i o = ?100 a; v cc = 1.65 v to 3.6 v v cc ? 0.2 ? ? v cc ? 0.3 ? ? i o = ?4 ma; v cc = 1.65 v 1.2 ? ? 1.05 ? ? i o = ?8 ma; v cc = 2.3 v 1.8 ? ? 1.65 ? ? i o = ?12 ma; v cc = 2.7 v 2.2 ? ? 2.05 ? ? i o = ?18 ma; v cc = 3.0 v 2.4 ? ? 2.25 ? ? i o = ?24 ma; v cc = 3.0 v 2.2 ? ? 2.0 ? ? v ol low?level output voltage v i = v ih or v il v i o = 100 a; v cc = 1.65 v to 3.6 v ? ? 0.2 ? ? 0.3 i o = 4 ma; v cc = 1.65 v ? ? 0.45 ? ? 0.65 i o = 8 ma; v cc = 2.3 v ? ? 0.6 ? ? 0.8 i o = 12 ma; v cc = 2.7 v ? ? 0.4 ? ? 0.6 i o = 24 ma; v cc = 3.0 v ? ? 0.55 ? ? 0.8 i i input leakage current v i = 5.5v or gnd v cc = 3.6 v ? 0.1 5 ? 0.1 20 a i off power?off leakage current v i or v o = 5.5 v; v cc = 0.0 v ? 0.1 10 ? 0.1 20 a i cc supply current v i = v cc or gnd; i o = 0 a; v cc = 3.6 v ? 0.1 10 ? 0.1 40 a i cc additional supply current per input pin; v i = v cc ? 0.6 v; i o = 0 a; v cc = 2.7 v to 3.6 v ? 5 500 ? 5 5000 a product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. all typical values are measured at t a = 25 c and v cc = 3.3 v, unless stated otherwise.
74lvc86a www. onsemi.com 5 ac electrical characteristics (t r = t f = 2.5 ns) symbol parameter conditions ?40 c to +85 c ?40 c to +125 c unit min typ 1 max min typ 1 max t pd propagation delay (note 5) v cc = 1.2 v ? 11.0 ? ? ? ? ns v cc = 1.65 v to 1.95 v 0.5 4.1 9.8 0.5 ? 11.4 ns v cc = 2.3 v to 2.7 v 0.5 2.4 5.6 0.5 ? 6.5 v cc = 2.7 v 0.5 2.5 5.8 0.5 ? 7.0 v cc = 3.0 v to 3.6 v 0.5 2.2 5.0 0.5 ? 6.0 t sk(0) output skew time (note 6) v cc = 3.0 v to 3.6 v ? ? 1.0 ? ? 1.5 ns product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. typical values are measured at t a = 25 c and v cc = 3.3 v, unless stated otherwise. 5. t pd is the same as t plh and t phl . 6. skew is defined as the absolute value of the dif ference between the actual propagation delay for any two separate outputs of the same d evice. the specification applies to any outputs switching in the same direction, either high?to?low (t oshl ) or low?to?high (t oslh ); parameter guaranteed by design. dynamic switching characteristics symbo l characteristic condition t a = +25 c unit min typ max v olp dynamic low peak voltage (note 7) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc = 2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v 0.8 0.6 v v olv dynamic low valley voltage (note 7) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc = 2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v ?0.8 ?0.6 v 7. number of outputs defined as ?n?. measured with ?n?1? outputs switching from high?to?low or low?to?high. the remaining output is measured in the low state. capacitive characteristics symbol parameter condition typical unit c in input capacitance v cc = 3.3 v , v i = 0 v or v cc 4.0 pf c out output capacitance v cc = 3.3 v , v i = 0 v or v cc 5.0 pf c pd power dissipation capacitance (note 8) per input; v i = gnd or v cc pf v cc = 1.65 v to 1.95 v 12.5 v cc = 2.3 v to 2.7 v 16.3 v cc = 3.0 v to 3.6 v 19.7 8. c pd is used to determine the dynamic power dissipation (p d in w). p d = c pd x v cc 2 x fi x n + (c l x v cc 2 x fo) where: fi = input frequency in mhz; fo = output frequency in mhz c l = output load capacitance in pf v cc = supply voltage in volts n = number of outputs switching (c l x v cc 2 x fo) = sum of the outputs.
74lvc86a www. onsemi.com 6 waveform 1 - non-inverting propagation delays t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns waveform 2 - inverting propagation delays t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns v cc 0 v v oh v ol an, bn on t plh t phl vmi vmi vmo vmo v cc 0 v v oh v ol an, bn on t phl t plh vmi vmi vmo vmo vcc symbol 3.3 v + 0.3 v 2.7 v v cc < 2.7 v vmi 1.5 v 1.5 v vcc/2 vmo 1.5 v 1.5 v vcc/2 figure 3. ac waveforms pulse generator r t dut v cc r l c l c l includes jig and probe capacitance r t = z out of pulse generator (typically 50 ) v i v o supply voltage input load v cc (v) v i t r , t f c l r l 1.2 v cc 2 ns 30 pf 1 k 1.65 ? 1.95 v cc 2 ns 30 pf 1 k 2.3 ? 2.7 v cc 2 ns 30 pf 500 2.7 2.7 v 2.5 ns 50 pf 500 3 ? 3.6 2.7 v 2.5 ns 50 pf 500 figure 4. test circuit
74lvc86a www. onsemi.com 7 ordering information device package shipping ? 74LVC86ADR2G soic?14 nb (pb?free) 2500 / tape & reel 74lvc86adtr2g tssop?14 (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
74lvc86a www. onsemi.com 8 package dimensions tssop?14 case 948g issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ?u? seating plane 0.10 (0.004) ?t? ??? ??? ??? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ?v? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
74lvc86a www. onsemi.com 9 package dimensions soic?14 nb case 751a?03 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of at maximum material condition. 4. dimensions d and e do not include mold protrusions. 5. maximum mold protrusion 0.15 per side. h 14 8 7 1 m 0.25 b m c h x 45 seating plane a1 a m s a m 0.25 b s c b 13x b a e d e detail a l a3 detail a dim min max min max inches millimeters d 8.55 8.75 0.337 0.344 e 3.80 4.00 0.150 0.157 a 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 l 0.40 1.25 0.016 0.049 e 1.27 bsc 0.050 bsc a3 0.19 0.25 0.008 0.010 a1 0.10 0.25 0.004 0.010 m 0 7 0 7 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 6.50 14x 0.58 14x 1.18 1.27 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 74lvc86a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.
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